https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103144
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Last reconfirmed| |2021-11-09
Blocks| |53947
Status|UNCONFIRMED |NEW
CC| |rguenth at gcc dot gnu.org
Ever confirmed|0 |1
--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
There are two choices.
1) implement more general induction support and vectorize it as
shiftv = { shift, shift >>1, shift>>2, shift>>3 };
for (int64_t i = 0; i != 64; i++)
{
pdst[i] = psrc[i] + shiftv;
shiftv >>= {4, 4, 4, 4};
}
(I think I've seen related bugreports doing bit-flip "induction" with XOR)
2) add the ability to have patterns for PHIs and do what you suggest,
pattern-replacing the shift PHI def with a non-PHI pattern shift >> i
after doing cycle analysis - then the PHI and the shift >>= 1 should become
!STMT_VINFO_RELEVANT.
Referenced Bugs:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53947
[Bug 53947] [meta-bug] vectorizer missed-optimizations
