https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103135
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Last reconfirmed| |2021-11-09
Ever confirmed|0 |1
CC| |aoliva at gcc dot gnu.org
Target| |x86_64-*-*
--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
The issue is likely that we have combined the bit test and the compare:
(note 77 86 78 2 t4.c:4 NOTE_INSN_INLINE_ENTRY)
(note 78 77 87 2 t4.c:6 NOTE_INSN_BEGIN_STMT)
(note 87 78 56 2 (var_location i (nil) [uninit]) NOTE_INSN_VAR_LOCATION)
(insn:TI 56 87 24 2 (set (reg:CCZ 17 flags)
(compare:CCZ (and:QI (reg:QI 4 si [orig:83 val.1_2 ] [83])
(const_int 1 [0x1]))
(const_int 0 [0]))) "t4.c":13:5 502 {*testqi_1_maybe_si}
(nil))
(jump_insn 24 56 25 2 (set (pc)
(if_then_else (eq (reg:CCZ 17 flags)
(const_int 0 [0]))
(label_ref 33)
(pc))) "t4.c":13:5 855 {*jcc}
(expr_list:REG_DEAD (reg:CCZ 17 flags)
(int_list:REG_BR_PROB 536870916 (nil)))
and thus no instruction remains in the inlined instance. For reference, at
GIMPLE we still have
[t4.c:4:12] # DEBUG INLINE_ENTRY isodd
[t4.c:6:2] # DEBUG BEGIN_STMT
[t4.c:6:11] _6 = val.1_2 & 1;
[t4.c:13:6] # DEBUG i => NULL
[t4.c:13:5] if (_6 != 0)
and the assembly is
testb $1, %sil
je .L2
so it's basically "unfortunate" combination of the CC set with the
bit test location. Alex, is there a "feature" we have to capture
this somehow?
