https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102154
--- Comment #8 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to Hongtao.liu from comment #7)
> (In reply to Hongtao.liu from comment #6)
> > Reproduced with a simple testcase
> >
> >
> > float
> > foo (long a)
> > {
> > union{long a;
> > float b[2];}c;
> > c.a = a;
> > return c.b[1];
> > }
>
> (subreg:SF (reg:DI) 4) is genrated by extract_bit_field_as_subreg, x86
> doesn't have this error because if failed condition lowpart_bit_field_p
> while ppc64 passed.
>
> the difference here is x86 is not BYTES_BIG_ENDIAN but ppc64.
>
> static bool
> lowpart_bit_field_p (poly_uint64 bitnum, poly_uint64 bitsize,
> machine_mode struct_mode)
> {
> poly_uint64 regsize = REGMODE_NATURAL_SIZE (struct_mode);
> if (BYTES_BIG_ENDIAN)
> return (multiple_p (bitnum, BITS_PER_UNIT)
> && (known_eq (bitnum + bitsize, GET_MODE_BITSIZE (struct_mode))
> || multiple_p (bitnum + bitsize,
> regsize * BITS_PER_UNIT)));
> else
> return multiple_p (bitnum, regsize * BITS_PER_UNIT);
> }
(define_insn "movsf_hardfloat"
[(set (match_operand:SF 0 "nonimmediate_operand"
"=!r, f, v, wa, m, wY,
Z, m, wa, !r, f, wa,
!r, *c*l, !r, *h")
(match_operand:SF 1 "input_operand"
"m, m, wY, Z, f, v,
wa, r, j, j, f, wa,
r, r, *h, 0"))]
"(register_operand (operands[0], SFmode)
|| register_operand (operands[1], SFmode))
&& TARGET_HARD_FLOAT
&& (TARGET_ALLOW_SF_SUBREG
|| valid_sf_si_move (operands[0], operands[1], SFmode))"
Oh, The pattern disllow sf subreg.
