https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101609
--- Comment #4 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Tejas Belagod <bela...@gcc.gnu.org>: https://gcc.gnu.org/g:e2e0b85c1e7cb53fd720df0d09278e3d485c733e commit r12-2817-ge2e0b85c1e7cb53fd720df0d09278e3d485c733e Author: Tejas Belagod <tbela...@arm.com> Date: Mon Aug 9 11:33:30 2021 +0100 PR101609: Use the correct iterator for AArch64 vector right shift pattern Loops containing long long shifts fail to vectorize due to the vectorizer not being able to recognize long long right shifts. This is due to a bug in the iterator used for the vashr and vlshr patterns in aarch64-simd.md. 2021-08-09 Tejas Belagod <tejas.bela...@arm.com> gcc/ChangeLog PR target/101609 * config/aarch64/aarch64-simd.md (vlshr<mode>3, vashr<mode>3): Use the right iterator. gcc/testsuite/ChangeLog * gcc.target/aarch64/vect-shr-reg.c: New testcase. * gcc.target/aarch64/vect-shr-reg-run.c: Likewise.
