https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101743

Hongtao.liu <crazylht at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |crazylht at gmail dot com

--- Comment #1 from Hongtao.liu <crazylht at gmail dot com> ---
+;; Eliminate a reg-reg mov by inverting the condition of a cmov (#1).
+;; mov r0,r1; dec r0; mov r2,r3; cmov r0,r2 -> dec r1; mov r0,r3; cmov r0, r1
+(define_peephole2
+ [(set (match_operand:SWI248 0 "register_operand")
+       (match_operand:SWI248 1 "register_operand"))
+  (parallel [(set (reg FLAGS_REG) (match_operand 5))
+            (set (match_dup 0) (match_operand:SWI248 6))])
+  (set (match_operand:SWI248 2 "register_operand")
+       (match_operand:SWI248 3))
+  (set (match_dup 0)
+       (if_then_else:SWI248 (match_operator 4 "ix86_comparison_operator"
+                            [(reg FLAGS_REG) (const_int 0)])
+       (match_dup 0)
+       (match_dup 2)))]
+ "TARGET_CMOVE
+  && REGNO (operands[2]) != REGNO (operands[0])
+  && REGNO (operands[2]) != REGNO (operands[1])
+  && peep2_reg_dead_p (1, operands[1])
+  && peep2_reg_dead_p (4, operands[2])
+  && !reg_overlap_mentioned_p (operands[0], operands[3])"
+ [(parallel [(set (match_dup 7) (match_dup 8))
+            (set (match_dup 1) (match_dup 9))])
+  (set (match_dup 0) (match_dup 3))
+  (set (match_dup 0) (if_then_else:SWI248 (match_dup 4)
+                                         (match_dup 1)
+                                         (match_dup 0)))]
+{
+  operands[7] = SET_DEST (XVECEXP (PATTERN (peep2_next_insn (1)), 0, 0));
+  operands[8] = replace_rtx (operands[5], operands[0], operands[1]);
+  operands[9] = replace_rtx (operands[6], operands[0], operands[1]);
+})
+
+;; Eliminate a reg-reg mov by inverting the condition of a cmov (#2).
+;; mov r2,r3; mov r0,r1; dec r0; cmov r0,r2 -> dec r1; mov r0,r3; cmov r0, r1

I guess the below peephole should refine its predicate as general_reg_operand,
since x86 support movement between gpr, sse, mask registers.

r1 here is very likely sse_reg_operand which result in ICE.

+(define_peephole2
+ [(set (match_operand:SWI248 2 "register_operand")
+       (match_operand:SWI248 3))
+  (set (match_operand:SWI248 0 "register_operand")
+       (match_operand:SWI248 1 "register_operand"))
+  (parallel [(set (reg FLAGS_REG) (match_operand 5))
+            (set (match_dup 0) (match_operand:SWI248 6))])
+  (set (match_dup 0)
+       (if_then_else:SWI248 (match_operator 4 "ix86_comparison_operator"
+                            [(reg FLAGS_REG) (const_int 0)])
+       (match_dup 0)
+       (match_dup 2)))]
+ "TARGET_CMOVE
+  && REGNO (operands[2]) != REGNO (operands[0])
+  && REGNO (operands[2]) != REGNO (operands[1])
+  && peep2_reg_dead_p (2, operands[1])
+  && peep2_reg_dead_p (4, operands[2])
+  && !reg_overlap_mentioned_p (operands[0], operands[3])"
+ [(parallel [(set (match_dup 7) (match_dup 8))
+            (set (match_dup 1) (match_dup 9))])
+  (set (match_dup 0) (match_dup 3))
+  (set (match_dup 0) (if_then_else:SWI248 (match_dup 4)
+                                         (match_dup 1)
+                                         (match_dup 0)))]
+{
+  operands[7] = SET_DEST (XVECEXP (PATTERN (peep2_next_insn (2)), 0, 0));
+  operands[8] = replace_rtx (operands[5], operands[0], operands[1]);
+  operands[9] = replace_rtx (operands[6], operands[0], operands[1]);
+})
+

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