https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100885
--- Comment #1 from Hongtao.liu <crazylht at gmail dot com> ---
152(define_register_constraint "Yw"
153 "TARGET_AVX512BW && TARGET_AVX512VL ? ALL_SSE_REGS : TARGET_SSE ? SSE_REGS
: NO_REGS"
154 "@internal Any EVEX encodable SSE register (@code{%xmm0-%xmm31}) for
AVX512BW with TARGET_AVX512VL target, otherwise any \
SSE register.")
19076(define_insn "sse4_1_<code>v8qiv8hi2<mask_name>"
19077 [(set (match_operand:V8HI 0 "register_operand" "=Yr,*x,Yw")
19078 (any_extend:V8HI
19079 (vec_select:V8QI
19080 (match_operand:V16QI 1 "register_operand" "Yr,*x,Yw")
19081 (parallel [(const_int 0) (const_int 1)
19082 (const_int 2) (const_int 3)
19083 (const_int 4) (const_int 5)
19084 (const_int 6) (const_int 7)]))))]
19085 "TARGET_SSE4_1 && <mask_avx512bw_condition> &&
<mask_avx512vl_condition>"
19086 "%vpmov<extsuffix>bw\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
19087 [(set_attr "isa" "noavx,noavx,avx")
19088 (set_attr "type" "ssemov")
19089 (set_attr "prefix_extra" "1")
19090 (set_attr "prefix" "orig,orig,maybe_evex")
19091 (set_attr "mode" "TI")])
With avx512vl Yw should be matched, and w/o avx512bw, only SSE_REGS should be
matched, why xmm16 is allocated?
