https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99706
--- Comment #8 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Tried
--- aarch64-simd.md.jj1 2021-03-08 23:40:33.846448416 +0100
+++ aarch64-simd.md 2021-03-23 12:40:51.325018722 +0100
@@ -133,7 +133,7 @@
[(set (match_operand:VQMOV 0 "nonimmediate_operand"
"=w, Umn, m, w, ?r, ?w, ?r, w")
(match_operand:VQMOV 1 "general_operand"
- "m, Dz, w, w, w, r, r, Dn"))]
+ "m, Dz, w, w, w, rk, rk, Dn"))]
"TARGET_SIMD
&& (register_operand (operands[0], <MODE>mode)
|| aarch64_simd_reg_or_zero (operands[1], <MODE>mode))"
@@ -1039,7 +1039,7 @@
[(set (match_operand:VALL_F16 0 "register_operand" "=w,w,w")
(vec_merge:VALL_F16
(vec_duplicate:VALL_F16
- (match_operand:<VEL> 1 "aarch64_simd_general_operand"
"w,?r,Utv"))
+ (match_operand:<VEL> 1 "aarch64_simd_general_operand"
"w,?rk,Utv"))
(match_operand:VALL_F16 3 "register_operand" "0,0,0")
(match_operand:SI 2 "immediate_operand" "i,i,i")))]
"TARGET_SIMD"
but it didn't help.
