https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99665
Bug ID: 99665 Summary: GCC can generate FPU instructions not supported by the .fpu directive it emits Product: gcc Version: 11.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: clyon at gcc dot gnu.org Target Milestone: --- While looking at the gcc.target/arm/simd/vmmla_1.c testcase, I noticed that when GCC is configured --target=arm-none-linux-gnueabihf --with-float=hard --with-mode=arm --with-cpu=cortex-a9 --with-fpu=neon-fp16 and invoked with -march=armv8.2-a+i8mm only (ie. no -mfpu, no -mfloat-abi option) we have #define __ARM_FEATURE_MATMUL_INT8 1, (so check_effective_target_arm_v8_2a_i8mm_ok_nocache decides no float-abi/fpu option is necessary) and the generated code has: .arch armv8.2-a .fpu neon-fp16 vsmmla.s8 q0, q1, q2 this instruction is not supported by neon-fp16, but the compiler still decided it could generate it. Using -mfpu=auto fixes this by emitting .fpu neon-fp-armv8, but it seems surprising that the compiler generates illegal code.