https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99422
--- Comment #28 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Eric Botcazou <ebotca...@gcc.gnu.org>: https://gcc.gnu.org/g:d8b84e2771fc2495493d0c66c3cba714484757d7 commit r11-7650-gd8b84e2771fc2495493d0c66c3cba714484757d7 Author: Eric Botcazou <ebotca...@adacore.com> Date: Fri Mar 12 17:07:20 2021 +0100 Fix memory constraint bug in SPARC back-end It's a bug exposed by the recent LRA changes, whereby the T constraint fails to behave properly when LRA is enabled (unlike when reload is enabled). The patch also gets rid of the awkward W constraint, which is strictly equivalent to m in 64-bit mode and, as a result, renames the w constraint into W. gcc/ PR target/99422 * config/sparc/constraints.md (w): Rename to... (W): ... this and ditch previous implementation. * config/sparc/sparc.md (*movdi_insn_sp64): Replace W with m. (*movdf_insn_sp64): Likewise. (*mov<VM64:mode>_insn_sp64): Likewise. * config/sparc/sync.md (*atomic_compare_and_swap<mode>_1): Replace w with W. (atomic_compare_and_swap_leon3_1): Likewise. (*atomic_compare_and_swapdi_v8plus): Likewise. * config/sparc/sparc.c (memory_ok_for_ldd): Remove useless test on architecture and add missing address validity check during LRA.
