https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99530
--- Comment #13 from Thiago Macieira <thiago at kde dot org> ---
> Since my patch uses output_asm_insn to finish the instruction, %P must be
> the last operand.
Okay.
If I wanted to abuse, I could just swap it around:
$ ~/dev/gcc/bin/gcc -fPIC -fno-plt -S -o - -O2 -xc - <<<'extern void f(void);
void g() { asm("cmp%z0 $0, %P0" : : "X" (f)); }' | grep GOTPC
cmpq $0, *f@GOTPCREL(%rip)
I can't see the need to do that.
The reason I needed to "call %P0" was to call an assembly function that did not
respect the ABI (intel-ipsec-mb's sha512_x8_avx512). The code looks like this:
#ifdef _WIN32
# define EXTRA_CLOBBER "rsi", "rdi",
# define OUT0 "+c" /* rcx */
# define OUT1 "+d" /* rdx */
#else
# define EXTRA_CLOBBER "rcx", "rdx",
# define OUT0 "+D" /* rdi */
# define OUT1 "+S" /* rsi */
#endif
extern void sha512_x8_avx512(void *data, size_t size_in_blocks);
__asm__ volatile ("call %P[func]"
: OUT0 (data),
OUT1 (size_in_blocks),
"+m" (*(char (*)[])data)
: [func] "X" (sha512_x8_avx512)
:
// caller-save registers
"rax", "r8", "r9", "r10", "r11",
EXTRA_CLOBBER
// the current implementation does not use RBX and RBP
// "rbx", "rbp",
// the current implementation does clobber these callee-save registers
"r12", "r13", "r14", "r15"
);
https://github.com/intel/intel-ipsec-mb/blob/master/lib/avx512/sha512_x8_avx512.asm#L417
