https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99070
--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Aaron Sawdey <acsaw...@gcc.gnu.org>: https://gcc.gnu.org/g:9433c844c8bcf0166567943b45576ceeeee0b131 commit r11-7570-g9433c844c8bcf0166567943b45576ceeeee0b131 Author: Aaron Sawdey <acsaw...@linux.ibm.com> Date: Sun Mar 7 14:47:31 2021 -0600 Tighten predicates for p10 ld/cmpi fusion PR99070 is caused by a fusion pattern matching that the individual instructions do not match when it is split later. In this case the ld+cmpi patterns were allowing a d-form load address, which the split condition would rightly split, however that left us with something that could not be matched by a ds-form ld instruction, hence the ICE. This only happened if the target cpu was not power10 -- if we were targeting power10 then a prefixed pld instruction would get generated because that can handle d-form. However this is not optimal code either. So the solution is a new predicate (ds_form_mem_operand) that only accepts what we can take as for a ds-form load. Then a small modification of the genfusion.pl script changes the relevant ld+cmpi patterns to use the new predicate. gcc/ChangeLog PR target/99070 * config/rs6000/predicates.md (ds_form_mem_operand) New predicate. * config/rs6000/genfusion.pl (gen_ld_cmpi_p10) Use ds_form_mem_operand in ld/lwa patterns. * config/rs6000/fusion.md: Regenerate file.
