https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98957

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |law at gcc dot gnu.org,
                   |                            |sayle at gcc dot gnu.org

--- Comment #4 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
The thing is that during combine that change allows one further optimization.
After successfully optimizing the and away:
Trying 8 -> 10:
    8: {r88:HI=r87:HI 0>>0x7;clobber flags:CC;}
      REG_DEAD r87:HI
      REG_UNUSED flags:CC
   10: {r90:HI=r88:HI&0x1;clobber flags:CC;}
      REG_DEAD r88:HI
      REG_UNUSED flags:CC
Successfully matched this instruction:
(parallel [
        (set (reg:HI 90)
            (lshiftrt:HI (reg:HI 87 [ m ])
                (const_int 7 [0x7])))
        (clobber (reg:CC 17 flags))
    ])
it adds it back again:
Trying 7, 10 -> 11:
    7: r87:HI=zero_extend(r91:SI#0)
      REG_DEAD r91:SI
   10: {r90:HI=r87:HI 0>>0x7;clobber flags:CC;}
      REG_DEAD r87:HI
      REG_UNUSED flags:CC
   11: r86:QI=r90:HI#0
      REG_DEAD r90:HI
Failed to match this instruction:
(set (subreg:HI (reg:QI 86) 0)
    (zero_extract:HI (subreg:HI (reg:SI 91) 0)
        (const_int 1 [0x1])
        (const_int 7 [0x7])))
Failed to match this instruction:
(set (subreg:HI (reg:QI 86) 0)
    (and:HI (lshiftrt:HI (subreg:HI (reg:SI 91) 0)
            (const_int 7 [0x7]))
        (const_int 1 [0x1])))
Successfully matched this instruction:
(set (reg:HI 90)
    (lshiftrt:HI (subreg:HI (reg:SI 91) 0)
        (const_int 7 [0x7])))
Successfully matched this instruction:
(set (subreg:HI (reg:QI 86) 0)
    (and:HI (reg:HI 90)
        (const_int 1 [0x1])))
allowing combination of insns 7, 10 and 11
original costs 4 + 4 + 4 = 12
replacement costs 4 + 4 = 8
deferring deletion of insn with uid = 7.
modifying insn i2    10: {r90:HI=r91:SI#0 0>>0x7;clobber flags:CC;}
      REG_UNUSED flags:CC
      REG_DEAD r91:SI
deferring rescan insn with uid = 10.
modifying insn i3    11: {r86:QI#0=r90:HI&0x1;clobber flags:CC;}
      REG_UNUSED flags:CC
      REG_DEAD r90:HI
deferring rescan insn with uid = 11.
in a 3 to 2 combination.  It is unclear why the
(insn 11 10 16 2 (set (reg:QI 86)
        (subreg:QI (reg:HI 90) 0)) "pr98957.c":3:14 77 {*movqi_internal}
     (expr_list:REG_DEAD (reg:HI 90)
        (nil)))
insn is considered to have any cost at all though...

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