[Bug c/98596] New: registers not reused on RISC-V

[marian.buschsieweke at ovgu dot de via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98596

            Bug ID: 98596
           Summary: registers not reused on RISC-V
           Product: gcc
           Version: 10.2.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
          Assignee: unassigned at gcc dot gnu.org
          Reporter: marian.buschsieweke at ovgu dot de
  Target Milestone: ---

Hi,

in this minimal example code


        #define CLINT_MSIP (*((volatile unsigned *)0x02000000U))
        void trigger_soft_irq(void)
        {
                CLINT_MSIP = 1;
                while (CLINT_MSIP == 1) { }
        }

GCC generates the following assembly when compiling with riscv-none-elf-gcc -S
-Os poc.c:

        trigger_soft_irq:
                li      a5,33554432
                li      a4,1
                sw      a4,0(a5)
                li      a3,33554432
                li      a5,1
        .L2:
                lw      a4,0(a3)
                beq     a4,a5,.L2
                ret

I think that GCC should instead reuse the values 1 and 0x02000000 previously
stored in register a5 and a4, rather than storing the exact same values again
in registers a3 and a5. So it should look instead like this:

        trigger_soft_irq:
                li      a5,33554432
                li      a4,1
                sw      a4,0(a5)
        .L2:
                lw      a3,0(a5)
                beq     a3,a4,.L2
                ret