https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97528
--- Comment #6 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The releases/gcc-10 branch has been updated by Jakub Jelinek <ja...@gcc.gnu.org>: https://gcc.gnu.org/g:05a3ab76e03ec6cff0bafb8495387b3a186785cc commit r10-9077-g05a3ab76e03ec6cff0bafb8495387b3a186785cc Author: Jakub Jelinek <ja...@redhat.com> Date: Fri Nov 20 12:26:58 2020 +0100 arm: Fix up neon_vector_mem_operand [PR97528] The documentation for POST_MODIFY says: Currently, the compiler can only handle second operands of the form (plus (reg) (reg)) and (plus (reg) (const_int)), where the first operand of the PLUS has to be the same register as the first operand of the *_MODIFY. The following testcase ICEs, because combine just attempts to simplify things and ends up with (post_modify (reg1) (plus (mult (reg2) (const_int 4)) (reg1)) but the target predicates accept it, because they only verify that POST_MODIFY's second operand is PLUS and the second operand of the PLUS is a REG. The following patch fixes this by performing further verification that the POST_MODIFY is in the form it should be. 2020-11-20 Jakub Jelinek <ja...@redhat.com> PR target/97528 * config/arm/arm.c (neon_vector_mem_operand): For POST_MODIFY, require first POST_MODIFY operand is a REG and is equal to the first operand of PLUS. * gcc.target/arm/pr97528.c: New test. (cherry picked from commit 410b8f6f41920dad200cd709f9f3de8b840a995c)
