https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97872
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Last reconfirmed| |2020-11-17
Ever confirmed|0 |1
Status|UNCONFIRMED |NEW
--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
So arm doesn't have a vec_cmp pattern that applies here? Before ISEL we have
vector(8) <signed-boolean:8> _1;
vector(8) signed char _2;
uint8x8_t _5;
<bb 2> [local count: 1073741824]:
_1 = a_3(D) < b_4(D);
_2 = VEC_COND_EXPR <_1, { -1, -1, -1, -1, -1, -1, -1, -1 }, { 0, 0, 0, 0, 0,
0, 0, 0 }>;
_5 = VIEW_CONVERT_EXPR<uint8x8_t>(_2);
return _5;
and ISEL should be able to directly expand a_3(D) < b_4(D) via .VEC_CMP
Alternatively the backend should optimize vcond expansion when the
operands are all ones/zeros.
