https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96756
Bug ID: 96756 Summary: [AArch64] Missed FPSR description on saturating instruction patterns Product: gcc Version: 11.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: xiezhiheng at huawei dot com Target Milestone: --- Target: aarch64 Test case: #include <arm_neon.h> #include <stdlib.h> typedef union { struct { int _xxx:24; unsigned int FZ:1; unsigned int DN:1; unsigned int AHP:1; unsigned int QC:1; int V:1; int C:1; int Z:1; int N:1; } b; unsigned int word; } _ARM_FPSCR; static volatile int __read_neon_cumulative_sat (void) { _ARM_FPSCR _afpscr_for_qc; asm volatile ("mrs %0,fpsr" : "=r" (_afpscr_for_qc)); return _afpscr_for_qc.b.QC; } int main() { uint32x2_t op0, op1, res; op0 = vdup_n_u32 ((uint32_t)0xfffffff0); op1 = vdup_n_u32 ((uint32_t)0x20); _ARM_FPSCR _afpscr_for_qc; asm volatile ("mrs %0,fpsr" : "=r" (_afpscr_for_qc)); _afpscr_for_qc.b.QC = (0); asm volatile ("msr fpsr,%0" : : "r" (_afpscr_for_qc)); res = vqadd_u32 (op0, op1); if (__read_neon_cumulative_sat () != 1) abort (); return 0; } Command line (GCC version 11.0): aarch64-linux-gnu-gcc test.c -O0 -o test $ ./test Run successfully Command line (GCC version 11.0): aarch64-linux-gnu-gcc test.c -O2 -o test $ ./test Aborted (core dumped) The test case has different results under -O0 and -O2. In RTL phase insn (insn 11 10 12 2 (set (reg:V2SI 97) (us_plus:V2SI (reg:V2SI 98) (reg:V2SI 99))) {aarch64_uqaddv2si} (nil)) would be eliminated because saturating instruction patterns have no side effect of set the FPSR register and this insn is treated as dead insn. Reference mails: https://gcc.gnu.org/pipermail/gcc-patches/2020-August/552367.html