https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96401
--- Comment #2 from Tom de Vries <vries at gcc dot gnu.org> ---
(In reply to Tom de Vries from comment #1)
> Using these changes, I get the desired:
> ...
> .reg.u32 %r22;
> ld.u32 %r22, [%frame];
> st.u16 [%frame+4], %r22;
> ...
And to be precise about it, that's starting at fwprop1 that we have two insns:
...
(insn 5 2 9 2
(set (reg:SI 22 [ v$0_1 ])
(mem/v/c:SI (reg/f:DI 2 %frame) [1 v+0 S4 A128]))
"test.c":7:6 6 {*movsi_insn}
(nil))
(insn 9 5 0 2
(set (mem/v/c:HI (plus:DI (reg/f:DI 2 %frame)
(const_int 4 [0x4])) [2 v2+0 S2 A32])
(subreg:HI (reg:SI 22 [ v$0_1 ]) 0))
"test.c":7:6 5 {*movhi_insn}
(expr_list:REG_DEAD (reg:SI 23 [ _2 ])
(nil)))
...
Which is a bit earlier (at 247r) than combine (at 271r).
