https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96226
--- Comment #1 from Uroš Bizjak <ubizjak at gmail dot com> ---
The combine produces:
Trying 7, 8 -> 9:
7: r89:SI=0x1
8: {r88:SI=r89:SI<<r90:SI&0x1f#0;clobber flags:CC;}
REG_DEAD r90:SI
REG_UNUSED flags:CC
REG_DEAD r89:SI
9: r86:SI=~r88:SI
REG_DEAD r88:SI
Failed to match this instruction:
(set (reg:SI 86)
(rotate:SI (const_int -2 [0xfffffffffffffffe])
(subreg:QI (and:SI (reg:SI 90)
(const_int 31 [0x1f])) 0)))
Successfully matched this instruction:
(set (reg:SI 88)
(and:SI (reg:SI 90)
(const_int 31 [0x1f])))
Failed to match this instruction:
(set (reg:SI 86)
(rotate:SI (const_int -2 [0xfffffffffffffffe])
(subreg:QI (reg:SI 88) 0)))
starting the processing of deferred insns
rescanning insn with uid = 8.
ending the processing of deferred insns
which tries to match:
(define_insn_and_split "*<rotate_insn><mode>3_mask"
[(set (match_operand:SWI48 0 "nonimmediate_operand")
(any_rotate:SWI48
(match_operand:SWI48 1 "nonimmediate_operand")
(subreg:QI
(and:SI
(match_operand:SI 2 "register_operand" "c")
(match_operand:SI 3 "const_int_operand")) 0)))
(clobber (reg:CC FLAGS_REG))]
"ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
&& (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
== GET_MODE_BITSIZE (<MODE>mode)-1
However, the above pattern doesn't allow immediate operand.
