https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95713
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target|i?86-*-* |x86_64-*-* i?86-*-*
Target Milestone|--- |10.2
CC| |hjl.tools at gmail dot com,
| |kyukhin at gcc dot gnu.org
--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
So the expansion of
b_4 = VEC_PACK_TRUNC_EXPR <_2, _7>;
with two V1SI operands results in a DImode rtx (reg:DI 93) but RTL
expansion wants to see it in (reg:SI 84) (that is b). But the
simplistic code doing that doesn't work (obviously):
temp = force_operand (temp, target);
if (temp != target)
emit_move_insn (target, temp);
I guess the expansion of VEC_PACK_TRUNC_EXPR is "wrong". We do have
CODE_FOR_vec_pack_trunc_si but that maps to
(define_expand "vec_pack_trunc_<mode>"
[(set (match_operand:<DOUBLEMASKMODE> 0 "register_operand")
(ior:<DOUBLEMASKMODE>
(ashift:<DOUBLEMASKMODE>
(zero_extend:<DOUBLEMASKMODE>
(match_operand:SWI24 2 "register_operand"))
(match_dup 3))
(zero_extend:<DOUBLEMASKMODE>
(match_operand:SWI24 1 "register_operand"))))]
"TARGET_AVX512BW"
where expand_binop_directly does
1098 if (binoptab == vec_pack_trunc_optab
...
1106 /* The mode of the result is different then the mode of the
1107 arguments. */
1108 tmp_mode = insn_data[(int) icode].operand[0].mode;
and tmp_mode ends up as DImode. Shouldn't the pattern use HALFMASKMODE?
Are those patterns supposed to only trigger for VECTOR_BOOLEAN and not
"generic" vectors mapping to integer modes?
