https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94795
--- Comment #3 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Gabriel Ravier from comment #2)
> Also, I can also provide this a very similar function for which such an
This optimization could be implemented with a simple combine splitter:
--cut here--
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b426c21d3dd..8ea3a4a141a 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -17979,6 +18045,18 @@
(clobber (reg:CC FLAGS_REG))])]
"operands[2] = GEN_INT (INTVAL (operands[2]) + 1);")
+(define_split
+ [(set (match_operand:SWI48 0 "register_operand")
+ (neg:SWI48
+ (eq:SWI48
+ (match_operand:SWI 1 "nonimmediate_operand")
+ (const_int 0))))]
+ ""
+ [(set (reg:CC FLAGS_REG) (compare:CC (match_dup 1) (const_int 1)))
+ (parallel [(set (match_dup 0)
+ (neg:SWI48 (ltu:SWI48 (reg:CC FLAGS_REG) (const_int 0))))
+ (clobber (reg:CC FLAGS_REG))])])
+
(define_insn "*mov<mode>cc_noc"
[(set (match_operand:SWI248 0 "register_operand" "=r,r")
(if_then_else:SWI248 (match_operator 1 "ix86_comparison_operator"
--cut here--
(QImode and HImode modes have to be added to *x86_mov<mode>cc_0_m1_neg pattern
for the above splitter to also output to QImode and HImode operands.)
