https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94449
Kewen Lin <linkw at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |ASSIGNED
--- Comment #8 from Kewen Lin <linkw at gcc dot gnu.org> ---
May I ask for the configuration option?
I used x86_64 machine in CFarm with cpuinfo
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 45
model name : Intel(R) Xeon(R) CPU E5-2660 0 @ 2.20GHz
...
I was unable to reproduce it with default configuration setting, but I was able
to
see the ICE with -march=znver2 specified for the failures.
I suspected there was some basic arch setting in your configuration? If so, I'm
wondering one more reasonable configuration option for E5 machine, it would
help to catch regression failures like this. Thanks in advance!
