https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93932
Michael Meissner <meissner at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |ASSIGNED
Assignee|unassigned at gcc dot gnu.org |meissner at gcc dot
gnu.org
--- Comment #1 from Michael Meissner <meissner at gcc dot gnu.org> ---
I've discovered that the issue is the combined insn that does variable extract
where it handles both the register case and the memory case:
(define_insn_and_split "vsx_extract_<mode>_var"
[(set (match_operand:<VS_scalar> 0 "gpc_reg_operand" "=v,wa,r")
(unspec:<VS_scalar> [(match_operand:VSX_D 1 "input_operand" "v,Q,Q")
(match_operand:DI 2 "gpc_reg_operand" "r,r,r")]
UNSPEC_VSX_EXTRACT))
(clobber (match_scratch:DI 3 "=r,&b,&b"))
(clobber (match_scratch:V2DI 4 "=&v,X,X"))]
"VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_DIRECT_MOVE_64BIT"
"#"
"&& reload_completed"
[(const_int 0)]
{
rs6000_split_vec_extract_var (operands[0], operands[1], operands[2],
operands[3], operands[4]);
DONE;
})
If I split the insn into two separate patterns, one that handles only the
register, and the other that only handles memory accesses. This way the
compiler doesn't create the store and does the variable extract in the
register.
