https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93376
--- Comment #6 from Jakub Jelinek <jakub at gcc dot gnu.org> --- Created attachment 47695 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=47695&action=edit gcc10-pr93376-2.patch This is a variant patch that uses POImode with 192 bit precision instead of OImode for these signed overflow patterns from TImode, so that it doesn't overflow wide_int_storage reserved bits. I'm afraid it is much more expensive because e.g. reload has arrays sized by number_of_modes^2. Yet another way around would be give up on the pattern macroization and instead of those (eq:CCO (plus:OI (sign_extend:OI (reg:TI)) (sign_extend:OI (reg:TI))) (sign_extend:OI (plus:TI (reg:TI) (reg:TI)))) and similar replace those (sign_extend:OI (whatever:TI)) with (sign_extract:TI (whatever:TI) (const_int 32) (const_int 32)) or so. Except that sign_extract is not valid for non-single-byte MEM. Or replace sign_extend with ashiftrt by (const_int 1)?
