https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90579
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Priority|P3 |P2
Status|NEW |ASSIGNED
Assignee|unassigned at gcc dot gnu.org |rguenth at gcc dot
gnu.org
Summary|[8/9/10 Regression] Huge |[8/9/10 Regression] Huge
|store forward stall due to |store forward stall due to
|vectorizer |vectorizer, missed CSE
--- Comment #9 from Richard Biener <rguenth at gcc dot gnu.org> ---
So we now have a "real" FRE after the vectorizer but we fail to CSE
MEM <vector(4) double> [(double *)&r] = vect__3.20_74;
...
MEM <vector(2) double> [(double *)&r + 32B] = vect__62.26_88;
...
vect__5.7_34 = MEM <vector(4) double> [(double *)&r + 16B];
mine for GCC 11 to look at. The code to CSE that load for _74 and _88
is going to be a bit awkward though but it will nicely combine with the
following stmts
vect__5.8_35 = VEC_PERM_EXPR <vect__5.7_34, vect__5.7_34, { 3, 2, 1, 0 }>;
stmp_t_12.9_36 = BIT_FIELD_REF <vect__5.8_35, 64, 0>;
stmp_t_12.9_37 = stmp_t_12.9_36 + 0.0;
stmp_t_12.9_38 = BIT_FIELD_REF <vect__5.8_35, 64, 64>;
stmp_t_12.9_39 = stmp_t_12.9_37 + stmp_t_12.9_38;
stmp_t_12.9_40 = BIT_FIELD_REF <vect__5.8_35, 64, 128>;
stmp_t_12.9_41 = stmp_t_12.9_39 + stmp_t_12.9_40;
stmp_t_12.9_42 = BIT_FIELD_REF <vect__5.8_35, 64, 192>;
t_12 = stmp_t_12.9_41 + stmp_t_12.9_42;
and hopefully elide 'r' completely.
