https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92769
--- Comment #2 from Christophe Leroy <christophe.le...@c-s.fr> --- But CR0 being volatile doesn't prevent GCC to set/clr its SO bit just before branching to LR as the ASM functions do, does it ? In our ABIs, r3 is also volatile in our ABIs, it doesn't prevent using it as function return.
