https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92661
--- Comment #2 from David Edelsohn <dje at gcc dot gnu.org> ---
A crude work-around to allow GCC to bootstrap and show the extent of the
problem, I need the following patches to comment out all decimal builtins.
Index: rs6000-call.c
===================================================================
--- rs6000-call.c (revision 278691)
+++ rs6000-call.c (working copy)
@@ -7653,7 +7653,7 @@
/* signed args, unsigned return. */
case VSX_BUILTIN_XVCVDPUXDS_UNS:
case ALTIVEC_BUILTIN_FIXUNS_V4SF_V4SI:
- case MISC_BUILTIN_UNPACK_TD:
+ /* case MISC_BUILTIN_UNPACK_TD: */
case MISC_BUILTIN_UNPACK_V1TI:
h.uns_p[0] = 1;
break;
@@ -7676,7 +7676,7 @@
break;
/* unsigned arguments for 128-bit pack instructions. */
- case MISC_BUILTIN_PACK_TD:
+ /* case MISC_BUILTIN_PACK_TD: */
case MISC_BUILTIN_PACK_V1TI:
h.uns_p[1] = 1;
h.uns_p[2] = 1;
Index: rs6000-c.c
===================================================================
--- rs6000-c.c (revision 278691)
+++ rs6000-c.c (working copy)
@@ -4884,6 +4884,7 @@
{ P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD,
RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
+#if 0
{ P9_BUILTIN_DFP_TSTSFI_LT, MISC_BUILTIN_TSTSFI_LT_TD,
RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
{ P9_BUILTIN_DFP_TSTSFI_LT, MISC_BUILTIN_TSTSFI_LT_DD,
@@ -4923,6 +4924,7 @@
RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
{ P9_BUILTIN_DFP_TSTSFI_OV_DD, MISC_BUILTIN_TSTSFI_OV_DD,
RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
+#endif
{ P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZB,
RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
Index: rs6000-builtin.def
===================================================================
--- rs6000-builtin.def (revision 278691)
+++ rs6000-builtin.def (working copy)
@@ -2298,6 +2298,7 @@
BU_P7_POWERPC64_MISC_2 (DIVDE, "divde", CONST, dive_di)
BU_P7_POWERPC64_MISC_2 (DIVDEU, "divdeu", CONST, diveu_di)
+#if 0
/* 1 argument DFP (decimal floating point) functions added in ISA 2.05. */
BU_DFP_MISC_1 (DXEX, "dxex", CONST, dfp_dxex_dd)
BU_DFP_MISC_1 (DXEXQ, "dxexq", CONST, dfp_dxex_td)
@@ -2313,6 +2314,7 @@
BU_DFP_MISC_2 (DSCLIQ, "dscliq", CONST, dfp_dscli_td)
BU_DFP_MISC_2 (DSCRI, "dscri", CONST, dfp_dscri_dd)
BU_DFP_MISC_2 (DSCRIQ, "dscriq", CONST, dfp_dscri_td)
+#endif
/* 0 argument void function that we pretend was added in ISA 2.06.
It's a special nop recognized by 2018+ firmware for P7 and up,
@@ -2338,9 +2340,11 @@
BU_P8V_MISC_3 (BCDSUB_GT, "bcdsub_gt", CONST, bcdsub_gt)
BU_P8V_MISC_3 (BCDSUB_OV, "bcdsub_ov", CONST, bcdsub_unordered)
+#if 0
/* 2 argument pack/unpack 128-bit floating point types. */
BU_DFP_MISC_2 (PACK_TD, "pack_dec128", CONST, packtd)
BU_DFP_MISC_2 (UNPACK_TD, "unpack_dec128", CONST, unpacktd)
+#endif
/* 0 argument general-purpose register functions added in ISA 3.0 (power9).
*/
BU_P9_MISC_0 (DARN_32, "darn_32", MISC, darn_32)
@@ -2356,6 +2360,7 @@
BU_P7_MISC_2 (PACK_V1TI, "pack_vector_int128", CONST, packv1ti)
BU_P7_MISC_2 (UNPACK_V1TI, "unpack_vector_int128", CONST, unpackv1ti)
+#if 0
/* 2 argument DFP (Decimal Floating Point) functions added in ISA 3.0. */
BU_P9_DFP_MISC_2 (TSTSFI_LT_DD, "dtstsfi_lt_dd", CONST, dfptstsfi_lt_dd)
BU_P9_DFP_MISC_2 (TSTSFI_LT_TD, "dtstsfi_lt_td", CONST, dfptstsfi_lt_td)
@@ -2385,6 +2390,7 @@
BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV, "dtstsfi_ov")
BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV_DD, "dtstsfi_ov_dd")
BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV_TD, "dtstsfi_ov_td")
+#endif
/* 1 argument vector functions added in ISA 3.0 (power9). */
BU_P9V_AV_1 (VCTZB, "vctzb", CONST, ctzv16qi2)
