https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91719
Uroš Bizjak <ubizjak at gmail dot com> changed: What |Removed |Added ---------------------------------------------------------------------------- Status|UNCONFIRMED |ASSIGNED Last reconfirmed| |2019-09-10 Assignee|unassigned at gcc dot gnu.org |ubizjak at gmail dot com Target Milestone|--- |10.0 Ever confirmed|0 |1 --- Comment #2 from Uroš Bizjak <ubizjak at gmail dot com> --- Proposed patch: --cut here-- diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md index ba146e3c8f81..b23dbf93bde7 100644 --- a/gcc/config/i386/sync.md +++ b/gcc/config/i386/sync.md @@ -306,8 +306,8 @@ { operands[1] = force_reg (<MODE>mode, operands[1]); - /* For seq-cst stores, when we lack MFENCE, use XCHG. */ - if (is_mm_seq_cst (model) && !(TARGET_64BIT || TARGET_SSE2)) + /* For seq-cst stores use XCHG. */ + if (is_mm_seq_cst (model)) { emit_insn (gen_atomic_exchange<mode> (gen_reg_rtx (<MODE>mode), operands[0], operands[1], --cut here--