https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91604
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |ASSIGNED
Assignee|unassigned at gcc dot gnu.org |jakub at gcc dot gnu.org
--- Comment #4 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Created attachment 46799
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=46799&action=edit
gcc10-pr91604.patch
I can reproduce if I pass -msse2, otherwise I couldn't.
Anyway, the problem with this set of command line options is that when
adjust_address_1 calls change_address_1, it will do:
417 /* By passing constant addresses through registers
418 we get a chance to cse them. */
419 if (! cse_not_expected && CONSTANT_P (x) && CONSTANT_ADDRESS_P (x))
420 x = force_reg (address_mode, x);
As split_double_mode does that separately for each MEM, we end up with
different addresses between what is supposed to be a matching MEM, only some
later CSE would optimize it back again, but we run into the recog failure
before that.
The attached patch fixes it by special casing it in split_double_mode, if we
have a rtx_equal_p MEM operand, reuse the previously split operand rather than
create it again. Assumes at most one matching MEM, which is I think generally
the case in the backend.
