https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91043
--- Comment #19 from Hanoch Haim <hhaim at cisco dot com> ---
After some investigation, I think it is not a gcc issue, please verify.
One of the internal object does not include a 64B alignment.
#define __rte_cache_aligned __attribute__((__aligned__(64)));
class CTimeHistogram {
} __rte_cache_aligned;
class CCPortLatency {
public:
CTimeHistogram m_hist;
} __rte_cache_aligned; <<= without this, it is not aligned while the code
generation assumed it is aligned !
class Root {
CCPortLatency port;
} __rte_cache_aligned;
Is it valid? why the code generation assumed the CCPortLatency is aligned
because one of its internal is aligned?
