https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89523
--- Comment #3 from hjl at gcc dot gnu.org <hjl at gcc dot gnu.org> --- Author: hjl Date: Sun Mar 17 09:27:56 2019 New Revision: 269739 URL: https://gcc.gnu.org/viewcvs?rev=269739&root=gcc&view=rev Log: x32: Add addr32 prefix to VSIB address 32-bit indices in VSIB address are sign-extended to 64 bits. In x32, when 32-bit indices are used as addresses, like in vgatherdps %ymm7, 0(,%ymm9,1), %ymm6 32-bit indices, 0xf7fa3010, is sign-extended to 0xfffffffff7fa3010 which is invalid address. Add addr32 prefix to UNSPEC_VSIBADDR instructions for x32 if there is no base register nor symbol. This fixes 175.vpr and 254.gap in SPEC CPU 2000 on x32 with -Ofast -funroll-loops -march=haswell gcc/ Backport from mainline 2019-03-14 H.J. Lu <hongjiu...@intel.com> PR target/89523 * config/i386/i386.c (ix86_print_operand): Handle 'M' to add addr32 prefix to VSIB address for X32. * config/i386/sse.md (*avx512pf_gatherpf<mode>sf_mask): Prepend "%M2" to opcode. (*avx512pf_gatherpf<mode>df_mask): Likewise. (*avx512pf_scatterpf<mode>sf_mask): Likewise. (*avx512pf_scatterpf<mode>df_mask): Likewise. (*avx2_gathersi<mode>): Prepend "%M3" to opcode. (*avx2_gathersi<mode>_2): Prepend "%M2" to opcode. (*avx2_gatherdi<mode>): Prepend "%M3" to opcode. (*avx2_gatherdi<mode>_2): Prepend "%M2" to opcode. (*avx2_gatherdi<mode>_3): Prepend "%M3" to opcode. (*avx2_gatherdi<mode>_4): Prepend "%M2" to opcode.` (*avx512f_gathersi<mode>): Prepend "%M4" to opcode. (*avx512f_gathersi<mode>_2): Prepend "%M3" to opcode. (*avx512f_gatherdi<mode>): Prepend "%M4" to opcode. (*avx512f_gatherdi<mode>_2): Prepend "%M3" to opcode. (*avx512f_scattersi<mode>): Prepend "%M0" to opcode. (*avx512f_scatterdi<mode>): Likewise. gcc/testsuite/ Backport from mainline 2019-03-14 H.J. Lu <hongjiu...@intel.com> PR target/89523 * gcc.target/i386/pr89523-1a.c: New test. * gcc.target/i386/pr89523-1b.c: Likewise. * gcc.target/i386/pr89523-2.c: Likewise. * gcc.target/i386/pr89523-3.c: Likewise. * gcc.target/i386/pr89523-4.c: Likewise. * gcc.target/i386/pr89523-5.c: Likewise. * gcc.target/i386/pr89523-6.c: Likewise. * gcc.target/i386/pr89523-7.c: Likewise. * gcc.target/i386/pr89523-8.c: Likewise. * gcc.target/i386/pr89523-9.c: Likewise. Added: branches/gcc-7-branch/gcc/testsuite/gcc.target/i386/pr89523-1a.c branches/gcc-7-branch/gcc/testsuite/gcc.target/i386/pr89523-1b.c branches/gcc-7-branch/gcc/testsuite/gcc.target/i386/pr89523-2.c branches/gcc-7-branch/gcc/testsuite/gcc.target/i386/pr89523-3.c branches/gcc-7-branch/gcc/testsuite/gcc.target/i386/pr89523-4.c branches/gcc-7-branch/gcc/testsuite/gcc.target/i386/pr89523-5.c branches/gcc-7-branch/gcc/testsuite/gcc.target/i386/pr89523-6.c branches/gcc-7-branch/gcc/testsuite/gcc.target/i386/pr89523-7.c branches/gcc-7-branch/gcc/testsuite/gcc.target/i386/pr89523-8.c branches/gcc-7-branch/gcc/testsuite/gcc.target/i386/pr89523-9.c Modified: branches/gcc-7-branch/gcc/ChangeLog branches/gcc-7-branch/gcc/config/i386/i386.c branches/gcc-7-branch/gcc/config/i386/sse.md branches/gcc-7-branch/gcc/testsuite/ChangeLog
