https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89461
--- Comment #6 from dave.anglin at bell dot net --- On 2019-02-27 4:19 a.m., fw at gcc dot gnu.org wrote: > Is it really true that 64-bit PA-RISC lacks 64-bit atomics? That's … awkward. PA-RISC only has two atomic instructions (ldcw and ldcd). These are insufficient to implement a full set of 32-bit atomics without kernel support. In the 32-bit runtime, we can't in general use the ldd and std instructions as the upper 32 register bits are not guaranteed to be preserved during context switches. So, one has to use 64-bit floating point loads and stores to ensure the operation operates atomically on memory. This makes 64-bit atomics really ugly with a 32-bit kernel. We have implemented a kernel helper to implement atomic support on linux. There is no documented kernel helper on hpux although I believe HP implemented pthread support using light weight system calls. Using a kernel helper, tends to make atomics very slow when there is contention. I tend to think using 64-bit atomics on 32-bit architectures is not a good idea. Dave
