https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87600
--- Comment #1 from Peter Bergner <bergner at gcc dot gnu.org> ---
Pasting some edited commentary from the gcc-patches mailing list:
On 10/8/18 9:52 AM, Jeff Law wrote:
> My tester is showing a variety of problems as well. hppa, sh4, aarch64,
> aarch64_be, alpha arm* and s390x bootstraps are all failing at various
> points. Others may trickle in over time, but clearly something went
> wrong recently. I'm going to start trying to pick them off after the
> morning meetings are wrapped up.
I looked into the PA-RISC test case issue Jeff sent me that is caused by my
patch that handles conflicts wrt reg copies and I _think_ I have a handle
on what the problem is, but don't yet know how to fix. Jeff, I agree with
the analysis you gave in your email to me, but to get Vlad up to speed, here
it is again along with some additional info.
Compiling the test case, we have the following RTL during IRA. I have also
annotated the pseudos in the RTL to include their hard reg assignment:
(insn 30 19 32 3 (set (reg/f:SI 112 "%r19") ....))
(insn 32 30 20 3 (set (reg:SI 26 %r26)
(reg/f:SI 101 "%r26")))
[snip]
(insn 23 22 49 3 (set (reg:SI 109 "%r28")
(mem:SI (reg/f:SI 101 "%r26"))))
(insn 49 23 31 3 (set (reg/f:SI 100 "%r28")
(if_then_else:SI (eq (reg:SI 109 "%r28") (const_int 15 [0xf]))
(reg/f:SI 101 "%r26")
(const_int 0 [0])))
(expr_list:REG_DEAD (reg:SI 109 "%r28")
(expr_list:REG_DEAD (reg/f:SI 101 "%r26"))))
(insn 31 49 33 3 (set (mem/f:SI (reg/f:SI 112 "%r19"))
(reg/f:SI 100 "%r28"))
(expr_list:REG_DEAD (reg/f:SI 112 "%r19")
(expr_list:REG_DEAD (reg/f:SI 100 "%r28"))))
(call_insn 33 31 36 3 (parallel [
(call (mem:SI (symbol_ref/v:SI ("@_Z3yowP11dw_cfi_node"))
(const_int 16 [0x10]))
(clobber (reg:SI 1 %r1))
(clobber (reg:SI 2 %r2))
(use (const_int 0 [0]))])
(expr_list:REG_DEAD (reg:SI 26 %r26))
(expr_list:SI (use (reg:SI 26 %r26)))))
Before my patch, hard reg %r26 and pseudo 101 conflicted, but with my patch
they now (correctly) do not. IRA is able to assign hard regs to all of the
pseudos, but the constraints in the pattern for insn 49 forces op0 (pseudo 100)
and op1 (pseudo 101) to have the same hard reg. They are not, so reload comes
along and spills insn 49 with the following reloads:
Reloads for insn # 49
Reload 0: reload_in (SI) = (reg/f:SI 26 %r26 [orig:101 _10 ] [101])
reload_out (SI) = (reg/f:SI 28 %r28 [orig:100 iftmp.2_5 ] [100])
GENERAL_REGS, RELOAD_OTHER (opnum = 0)
reload_in_reg: (reg/f:SI 26 %r26 [orig:101 _10 ] [101])
reload_out_reg: (reg/f:SI 28 %r28 [orig:100 iftmp.2_5 ] [100])
reload_reg_rtx: (reg/f:SI 26 %r26 [orig:101 _10 ] [101])
..giving us the following updated insn:
(insn 49 23 58 3 (set (reg/f:SI 26 %r26 [101])
(if_then_else:SI (eq (reg:SI 28 %r28 [109])
(const_int 15))
(reg/f:SI 26 %r26 [101])
(const_int 0 [0]))))
The problem is, that hard reg %r26 is defined in insn 32, to be used in
insn 33, so using %r26 as the reload reg is wrong, because it will clobber
the value we set in insn 32. HPPA is a reload (not LRA) target and looking
thru reload, it assumes that if any input pseudo dies in an insn, then the
hard reg assigned to the pseudo is free game for use with an output reload.
With my patch, that assumption is (now) wrong, because another simultaneously
live pseudo may be using that same hard reg or in this case, the hard reg
itself is still live.
Given no one wants to patch reload, the decision has been made to disable
the special reg copy handling my patch introduced whenever we're compiling
for a reload target via the following patch:
Index: gcc/ira-lives.c
===================================================================
--- gcc/ira-lives.c (revision 264897)
+++ gcc/ira-lives.c (working copy)
@@ -1064,6 +1064,11 @@ find_call_crossed_cheap_reg (rtx_insn *i
rtx
non_conflicting_reg_copy_p (rtx_insn *insn)
{
+ /* Reload has issues with overlapping pseudos being assigned to the
+ same hard register, so don't allow it. See PR87600 for details. */
+ if (!targetm.lra_p ())
+ return NULL_RTX;
+
rtx set = single_set (insn);
/* Disallow anything other than a simple register to register copy
