https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86882

--- Comment #6 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Segher Boessenkool from comment #5)
> So what is wrong about that?  CONST_INTs are sign-extended always, so
> 0xffffffffffffff00 is just fine?

As said in Comment #2, it is not wrong, just suspicious.

(insn 10 9 11 3 (set (reg:SI 94 [ <retval> ])
        (zero_extend:SI (reg:QI 92 [ <retval> ]))) "pr86882.c":10 140
{*zero_extendqisi2}
     (nil))
(insn 11 10 13 3 (parallel [
            (set (reg:SI 95 [ jd ])
                (xor:SI (reg:SI 94 [ <retval> ])
                    (const_int 257 [0x101])))
            (clobber (reg:CC 17 flags))
        ]) "pr86882.c":10 461 {*xorsi_1}
     (expr_list:REG_DEAD (reg:SI 94 [ <retval> ])
        (expr_list:REG_UNUSED (reg:CC 17 flags)
            (nil))))
(insn 13 11 14 3 (parallel [
            (set (reg:HI 97)
                (xor:HI (subreg:HI (reg:SI 95 [ jd ]) 0)
                    (subreg:HI (reg:QI 92 [ <retval> ]) 0)))
            (clobber (reg:CC 17 flags))
        ]) "pr86882.c":11 459 {*xorhi_1}
     (expr_list:REG_DEAD (reg:SI 95 [ jd ])
        (expr_list:REG_DEAD (reg:QI 92 [ <retval> ])
            (expr_list:REG_UNUSED (reg:CC 17 flags)
                (nil)))))

gets combined to:

Trying 10, 11 -> 13:

Successfully matched this instruction:
(set (reg:HI 95 [ jd ])
    (and:HI (subreg:HI (reg:QI 92 [ <retval> ]) 0)
        (const_int -256 [0xffffffffffffff00])))
Successfully matched this instruction:
(set (reg:HI 97)
    (xor:HI (reg:HI 95 [ jd ])
        (const_int 257 [0x101])))

The first one operates on paradoxical HImode subreg of QImode input operand
(valid bitmask 0xff), which is masked with 0xff00. The result is a value, which
has only highpart unmasked and lowpart = 0x00. Later, a couple instructions
operate in HImode, but finally we get to:

(insn 14 13 15 3 (set (reg:QI 92 [ <retval> ])
        (subreg:QI (reg:HI 97) 0)) "pr86882.c":11 88 {*movqi_internal}
     (nil))

which discards paradoxical highpart from the Himode operations. So, I guess the
above is OK (but I didn't check the validity of XOR and AND simplifications in
different modes).

It looks to me that the invalid RTX from comment #1 should read:

        (set (reg:QI 97)
            (const_int 1 [0x1]))

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