https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86693
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
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CC| |jakub at gcc dot gnu.org
--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
The reason why this works for sub/add is that x86 has xadd instruction, so we
expand it as xadd and later on during combine find out we are actually
comparing the result of lock; xadd with something we can optimize better and do
the optimization.
For __atomic_fetch_xor (ptr, x, y) == x (or != x), or __atomic_xor_fetch (ptr,
x, y) == 0 (or != 0), or __atomic_or_fetch (ptr, x, y) == 0 (or != 0), we'd
need to handle this specially already at expansion time, so with extra special
optabs, because there is no instruction that keeps the old or new value of xor
or ior in a register, and once we emit a compare and exchange loop, it is very
hard to optimize that to something different.
