https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86056
Bug ID: 86056
Summary: Codegen can result in multiple sequential mfence
instructions
Product: gcc
Version: 9.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: redbeard0531 at gmail dot com
Target Milestone: ---
This is from an example to prove that atomic_thread_fence does not prevent the
compiler from optimizing non-escaped memory.
https://godbolt.org/g/288mTC
#include <utility>
#include <atomic>
struct Type {
Type(Type&&)=default;
int i;
};
Type func(Type t) {
auto out = Type(Type(std::move(t)));
std::atomic_thread_fence(std::memory_order_seq_cst);
return out;
}
auto func2(Type t) { return func(func(func(func(std::move(t))))); }
func(Type):
movl (%rsi), %edx
movq %rdi, %rax
movl %edx, (%rdi)
mfence
ret
func2(Type):
movl (%rsi), %edx
movq %rdi, %rax
mfence
mfence
mfence
movl %edx, (%rdi)
mfence
ret
