https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85755
Bug ID: 85755
Summary: PowerPC Gcc's -mupdate produces inefficient code on
power8/power9 machines
Product: gcc
Version: 9.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: meissner at gcc dot gnu.org
Target Milestone: ---
If you compile the following code for -mcpu=power8 or -mcpu=power9, it wants to
generate a PRE_INC loop. However, the GPR movdi insn constraint uses the 'Y'
constraint for store, due to the LD/STD instructions being ds-form
instructions. Ds-form instructions cannot have the bottom 2 bits set in the
offset field. Because the register allocator does not have a GPR store that it
thinks can do a store with update, it does a direct move to the floating point
registers, and does a floating point store with update there.
We should probably allow store with update and load with update forms (or
disable DImode from generating the PRE_INC/PRE_DEC/PRE_MODIFY instructions):
Code:
void loop (long *q, long n)
{
long i;
for (i = 0; i < n; i++)
q[i] = i;
}
The code generated is:
loop:
.LFB0:
cmpdi 0,4,0
blelr 0
mtctr 4
addi 3,3,-8
li 9,0
.p2align 4,,15
.L3:
mtvsrd 0,9
addi 9,9,1
stfdu 0,8(3)
bdnz .L3
blr
