https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85216
David Edelsohn <dje at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |WAITING
Last reconfirmed| |2018-04-05
Ever confirmed|0 |1
--- Comment #1 from David Edelsohn <dje at gcc dot gnu.org> ---
What two additional instructions? x86 is a CISC architecture and Power is a
RISC architecture. x86 has an instruction that directly performs an indirect
call through a pointer. Power must explicitly load the pointer and move it to
the appropriate register to perform an indirect branch.
One can comment / questions that the *SEQUENCE* appears to require more time on
Power than the equivalent sequence on x86. But directly comparing instructions
and counting instructions in two different ISAs without context is not
meaningful.
