[Bug target/84279] [8 Regression] powerpc64le ICE on cvc4

[bergner at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84279

--- Comment #4 from Peter Bergner <bergner at gcc dot gnu.org> ---
This actually seems to be a constraint problem caused by mem_operand_gpr()
which implements the "Y" constraint (ie, mem's ok for GPR load/stores) allowing
altivec type addresses that contain the 'and' like we see in the ICE above. 
The patch below fixes the ICE and I'm going to bootstrap and regtest it.

Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c  (revision 257606)
+++ gcc/config/rs6000/rs6000.c  (working copy)
@@ -8220,6 +8220,12 @@
   int extra;
   rtx addr = XEXP (op, 0);

+  /* Don't allow altivec type addresses like (mem: (and: ...)).
+     See PR target/84279.  */
+
+  if (GET_CODE (addr) == AND)
+    return false;
+
   op = address_offset (addr);
   if (op == NULL_RTX)
     return true;