https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81763
--- Comment #21 from Uroš Bizjak <ubizjak at gmail dot com> ---
Following patch should fix the problem:
--cut here--
Index: i386.md
===================================================================
--- i386.md (revision 256935)
+++ i386.md (working copy)
@@ -9250,10 +9250,10 @@
})
(define_insn "*andndi3_doubleword"
- [(set (match_operand:DI 0 "register_operand" "=r,&r")
+ [(set (match_operand:DI 0 "register_operand" "=r,r")
(and:DI
(not:DI (match_operand:DI 1 "register_operand" "r,0"))
- (match_operand:DI 2 "nonimmediate_operand" "rm,rm")))
+ (match_operand:DI 2 "nonimmediate_operand" "r,rm")))
(clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT && TARGET_STV && TARGET_SSE2"
"#"
--cut here--
So, the pattern now reads:
(define_insn "*andndi3_doubleword"
[(set (match_operand:DI 0 "register_operand" "=r,r")
(and:DI
(not:DI (match_operand:DI 1 "register_operand" "r,0"))
(match_operand:DI 2 "nonimmediate_operand" "r,rm")))
(clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT && TARGET_STV && TARGET_SSE2"
"#"
[(set_attr "isa" "bmi,*")])
Instead of using earlyclobber on the output operand (which guarantees that no
input register will be clobbered), we can use a little trick and in case of
memory operand 2, match the output with a register operand 1. This will keep
output registers separate from registers in the memory operand (and is in fact
what we do in all other _doubleword patterns).
Jakub, I don't have Haswell target to test BMI instructions via native
bootstrap, can you perhaps bootstrap the compiler with the above patch?
