https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84011
Bug ID: 84011
Summary: Optimize switch table with -fPIE
Product: gcc
Version: 8.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: thgarnie at google dot com
Target Milestone: ---
Created attachment 43225
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=43225&action=edit
Switch test case
With -O2 and -fPIE switch tables are never optimized as well as they could. I
assume that's to reduce the number of relocations in code sections for COW page
support. It makes sense for -fPIC but not -fPIE. The Linux kernel x86_64 PIE
prototype ends with big switch tables when it could be optimized to few lines.
With -fno-PIE -O2:
0000000000000000 <phy_modes>:
0: b8 00 00 00 00 mov $0x0,%eax
1: R_X86_64_32 .rodata.str1.1
5: 83 ff 16 cmp $0x16,%edi
8: 77 0a ja 14 <phy_modes+0x14>
a: 89 ff mov %edi,%edi
c: 48 8b 04 fd 00 00 00 mov 0x0(,%rdi,8),%rax
13: 00
10: R_X86_64_32S .rodata
14: c3 retq
With -fPIE -O2:
0000000000000000 <phy_modes>:
0: 83 ff 16 cmp $0x16,%edi
3: 0f 87 87 01 00 00 ja 190 <phy_modes+0x190>
9: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # 10
<phy_modes+0x10>
c: R_X86_64_PC32 .rodata-0x4
10: 89 ff mov %edi,%edi
12: 48 63 04 ba movslq (%rdx,%rdi,4),%rax
16: 48 01 d0 add %rdx,%rax
19: ff e0 jmpq *%rax
1b: 0f 1f 44 00 00 nopl 0x0(%rax,%rax,1)
20: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 27
<phy_modes+0x27>
23: R_X86_64_PC32 .LC1-0x4
27: c3 retq
28: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
2f: 00
30: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 37
<phy_modes+0x37>
33: R_X86_64_PC32 .LC22-0x4
37: c3 retq
38: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
3f: 00
40: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 47
<phy_modes+0x47>
43: R_X86_64_PC32 .LC21-0x4
47: c3 retq
48: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
4f: 00
50: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 57
<phy_modes+0x57>
53: R_X86_64_PC32 .LC20-0x4
57: c3 retq
58: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
5f: 00
60: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 67
<phy_modes+0x67>
63: R_X86_64_PC32 .LC19-0x4
67: c3 retq
68: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
6f: 00
70: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 77
<phy_modes+0x77>
73: R_X86_64_PC32 .LC18-0x4
77: c3 retq
78: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
7f: 00
80: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 87
<phy_modes+0x87>
83: R_X86_64_PC32 .LC17-0x4
87: c3 retq
88: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
8f: 00
90: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 97
<phy_modes+0x97>
93: R_X86_64_PC32 .LC16-0x4
97: c3 retq
98: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
9f: 00
a0: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # a7
<phy_modes+0xa7>
a3: R_X86_64_PC32 .LC15-0x4
a7: c3 retq
a8: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
af: 00
b0: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b7
<phy_modes+0xb7>
b3: R_X86_64_PC32 .LC14-0x4
b7: c3 retq
b8: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
bf: 00
c0: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # c7
<phy_modes+0xc7>
c3: R_X86_64_PC32 .LC13-0x4
c7: c3 retq
c8: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
cf: 00
d0: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # d7
<phy_modes+0xd7>
d3: R_X86_64_PC32 .LC12-0x4
d7: c3 retq
d8: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
df: 00
e0: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # e7
<phy_modes+0xe7>
e3: R_X86_64_PC32 .LC11-0x4
e7: c3 retq
e8: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
ef: 00
f0: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # f7
<phy_modes+0xf7>
f3: R_X86_64_PC32 .LC10-0x4
f7: c3 retq
f8: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
ff: 00
100: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 107
<phy_modes+0x107>
103: R_X86_64_PC32 .LC9-0x4
107: c3 retq
108: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
10f: 00
110: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 117
<phy_modes+0x117>
113: R_X86_64_PC32 .LC8-0x4
117: c3 retq
118: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
11f: 00
120: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 127
<phy_modes+0x127>
123: R_X86_64_PC32 .LC7-0x4
127: c3 retq
128: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
12f: 00
130: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 137
<phy_modes+0x137>
133: R_X86_64_PC32 .LC6-0x4
137: c3 retq
138: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
13f: 00
140: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 147
<phy_modes+0x147>
143: R_X86_64_PC32 .LC5-0x4
147: c3 retq
148: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
14f: 00
150: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 157
<phy_modes+0x157>
153: R_X86_64_PC32 .LC4-0x4
157: c3 retq
158: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
15f: 00
160: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 167
<phy_modes+0x167>
163: R_X86_64_PC32 .LC3-0x4
167: c3 retq
168: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
16f: 00
170: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 177
<phy_modes+0x177>
173: R_X86_64_PC32 .LC2-0x4
177: c3 retq
178: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
17f: 00
180: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 187
<phy_modes+0x187>
183: R_X86_64_PC32 .LC23-0x4
187: c3 retq
188: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
18f: 00
190: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 197
<phy_modes+0x197>
193: R_X86_64_PC32 .LC0-0x4
197: c3 retq
Similar options for clang:
0000000000000000 <phy_modes>:
0: 83 ff 16 cmp $0x16,%edi
3: 77 0f ja 14 <phy_modes+0x14>
5: 48 63 c7 movslq %edi,%rax
8: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # f
<phy_modes+0xf>
b: R_X86_64_PC32 .data.rel.ro-0x4
f: 48 8b 04 c1 mov (%rcx,%rax,8),%rax
13: c3 retq
14: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 1b
<phy_modes+0x1b>
17: R_X86_64_PC32 .L.str.23-0x4
1b: c3 retq
