https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82729
--- Comment #3 from Peter Cordes <peter at cordes dot ca> ---
Oh also, why is MSP430 using 3 byte-stores instead of a mov.w + mov.b for
storing ab[]? (on the godbolt link in the initial report)
# msp430-gcc 6.2.1.16) 6.2.1 20161212
MOV.W #25185, 6(R1)
MOV.W #99, 8(R1) # abc[]
MOV.B #97, 3(R1)
MOV.B #98, 4(R1)
MOV.B #0, 5(R1) # ab[]
MOV.B #97, 1(R1)
MOV.B #0, 2(R1) # a[]
Even if alignment is required (IDK), either the first two or last two mov.b
instructions for ab[] could combine into a mov.w, like is done for abc[]. Is
that a target bug?
MSP430 is on Godbolt and it's not a RISC with word size > largest immediate, so
I was looking at it to see if it was just an x86 missed optimization.
Like I was saying for ARM, gcc seems to do a poor job on many RISC ISAs with
this, given the redundancy between strings.
