https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82621
Bug ID: 82621
Summary: [6/7/8 Regression] wrong code with -Og -fgcse -fweb
Product: gcc
Version: 8.0
Status: UNCONFIRMED
Keywords: wrong-code
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: zsojka at seznam dot cz
Target Milestone: ---
Host: x86_64-pc-linux-gnu
Target: powerpc-unknown-linux-gnu
Build: x86_64-pc-linux-gnu
Created attachment 42404
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=42404&action=edit
reduced testcase
Output:
$ powerpc-unknown-linux-gnu-gcc -Og -fgcse -fweb testcase.c
$ ./a.out
qemu: uncaught target signal 6 (Aborted) - core dumped
Aborted
$ powerpc-unknown-linux-gnu-gcc -v
Using built-in specs.
COLLECT_GCC=/repo/gcc-trunk/binary-latest-powerpc/bin/powerpc-unknown-linux-gnu-gcc
COLLECT_LTO_WRAPPER=/repo/gcc-trunk/binary-trunk-253803-checking-yes-rtl-df-extra-nographite-powerpc/bin/../libexec/gcc/powerpc-unknown-linux-gnu/8.0.0/lto-wrapper
Target: powerpc-unknown-linux-gnu
Configured with: /repo/gcc-trunk//configure --enable-languages=c,c++
--enable-valgrind-annotations --disable-nls --enable-checking=yes,rtl,df,extra
--without-cloog --without-ppl --without-isl
--with-sysroot=/usr/powerpc-unknown-linux-gnu --build=x86_64-pc-linux-gnu
--host=x86_64-pc-linux-gnu --target=powerpc-unknown-linux-gnu
--with-ld=/usr/bin/powerpc-unknown-linux-gnu-ld
--with-as=/usr/bin/powerpc-unknown-linux-gnu-as --disable-libstdcxx-pch
--prefix=/repo/gcc-trunk//binary-trunk-253803-checking-yes-rtl-df-extra-nographite-powerpc
Thread model: posix
gcc version 8.0.0 20171017 (experimental) (GCC)
The problem seems to be that .combine does:
...
insn_cost 4 for 109: r188:SI=0
insn_cost 4 for 77: {r196:SI=0-r188:SI;ca:SI=leu(r188:SI,0);}
REG_UNUSED ca:SI
insn_cost 4 for 79: {r203:SI=r130:SI-r188:SI;ca:SI=leu(r188:SI,r130:SI);}
REG_DEAD r188:SI
REG_DEAD r130:SI
REG_UNUSED ca:SI
insn_cost 4 for 81: r182:SI=high(`b')
insn_cost 8 for 83: r183:SI=[r182:SI+low(`b')]
REG_DEAD r182:SI
REG_EQUAL [`b']
insn_cost 4 for 89:
{r198:SI=r203:SI+r183:SI;ca:SI=ltu(r203:SI+r183:SI,r203:SI);}
REG_DEAD r203:SI
REG_DEAD r183:SI
insn_cost 4 for 90: {r197:SI=r196:SI+r196:SI+ca:SI;clobber ca:SI;}
REG_DEAD r196:SI
REG_DEAD ca:SI
REG_UNUSED ca:SI
...
Trying 77 -> 90:
Failed to match this instruction:
(parallel [
(set (reg:SI 197)
(const_int 1 [0x1]))
(clobber (reg:SI 76 ca))
])
Successfully matched this instruction:
(set (reg:SI 197)
(const_int 1 [0x1]))
allowing combination of insns 77 and 90
original costs 4 + 4 = 8
replacement cost 4
deferring deletion of insn with uid = 77.
deferring deletion of insn with uid = 77.
modifying insn i3 90: r197:SI=0x1
deferring rescan insn with uid = 90.
...
Even though ca from insn 89 should be used in insn 90.
