https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82524
--- Comment #8 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Actually, thinking about it, such an insn isn't really reloadable.
The addb %dh, %ah and similar instructions essentially require that one of the
input operands is a zero_extract from the same pseudo/hard register as is the
zero_extract in the dest, because if that isn't the case, then we essentially
have an instruction with 3 inputs and one output (the inputs are the 2 addition
operands and previous content of the register (bits 0-7 and 16-31)).
So I think we need to add a condition to addqi_ext_{1,2}, andqi_ext_1,
*andqi_ext_1_cc, *andqi_ext_2, *<code>qi_ext_1, *<code>qi_ext_2,
xorqi_ext_1_cc, *xorqi_ext_1_cc patterns (from quick scan), which depending on
whether the input operands are commutative or not would either require that one
of the input operands (or otherwise the first input) is rtx_equal_p to the
destination.
