https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65146
--- Comment #8 from Peter Cordes <peter at cordes dot ca> --- BTW, all of my proposals are really ABI changes, even if struct layout stays the same. All code has to agree on which objects are lock-free or not, and whether they need to check alignment before using an SSE load instead of lock cmpxchg8b or something. It won't be safe to link with binaries compiled with old gcc that assumes a simple SSE load/store is atomic on an 8B atomic_llong*, if the new design can still pass it underaligned pointers. The existing ABI is broken. Some code may happen to not be affected, especially when running on Intel hardware (where only 64B boundaries matter, not 8B boundaries for x86 in general). Or because they only depend on atomic RMW being atomic, not pure load or pure store, so they just take the ~100x performance hit without losing correctness in cases where a boundary is crossed.
