https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79581
Ramana Radhakrishnan <ramana at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Last reconfirmed| |2017-06-15
CC| |ramana at gcc dot gnu.org
Ever confirmed|0 |1
--- Comment #6 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> ---
(In reply to PeteVine from comment #4)
> > Judging by your -mcpu option is this on a Cortex-A5?
>
> Yes, if you look at the results on a Cortex A53 running armv7 code, it
> doesn't reproduce either, and A5-codegen is king :) (hopefully due to
> in-order design or sth)
>
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53659#c12
>
> A quick question regarding -mcpu=cortex-a5 codegen; is there a similar
> switch to llvm's `-slowfpvmlx` feature? (disable slow vmla/vmls), which the
> nice ARM guy divulged here:
>
> https://bugs.llvm.org//show_bug.cgi?id=26135#c9
>
> or is it a non-issue in gcc?
No, there isn't a similar switch to that in GCC that I'm aware of.
It's also not yet clear why the change is - the only difference is as per
kyrill's analysis in c#3
I'm going to confirm this but I don't have Cortex-A5 hardware to investigate /
play with this any further.
