[Bug target/80082] [5/6/7 regression] GCC incorrectly assumes Cortex-r[578] have 64-bit single-copy atomic LDRD

[ktkachov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80082

ktkachov at gcc dot gnu.org changed:

           What    |Removed                     |Added
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             Status|NEW                         |ASSIGNED
                 CC|                            |ktkachov at gcc dot gnu.org

--- Comment #3 from ktkachov at gcc dot gnu.org ---
Confirmed.
The problem is that these Cortex-R cores combined with the bit_adiv isa bit end
up having the same feature set as armv7ve as far as GCC can tell.

I think the best approach here is to create an isa_bit_lpae that's unique to
armv7ve (and higher A-profile arches)