https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79901
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |ASSIGNED
Last reconfirmed| |2017-03-06
CC| |jakub at gcc dot gnu.org
Target Milestone|--- |7.0
Ever confirmed|0 |1
--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
There is a bug in sse.md, vp{min,max}{s,u}q is available in AVX512F rather than
AVX512BW for 512-byte vectors. I'll have a look if there is also a bug in the
middle-end.
--- gcc/config/i386/sse.md.jj 2017-03-06 12:35:27.000000000 +0100
+++ gcc/config/i386/sse.md 2017-03-06 14:49:00.847127695 +0100
@@ -10841,7 +10841,7 @@ (define_expand "<code><mode>3_mask"
"TARGET_AVX512F"
"ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
-(define_insn "*avx512bw_<code><mode>3<mask_name>"
+(define_insn "*avx512f_<code><mode>3<mask_name>"
[(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
(maxmin:VI48_AVX512VL
(match_operand:VI48_AVX512VL 1 "nonimmediate_operand" "%v")
@@ -10865,10 +10865,10 @@ (define_insn "<mask_codefor><code><mode>
(set_attr "mode" "<sseinsnmode>")])
(define_expand "<code><mode>3"
- [(set (match_operand:VI8_AVX2_AVX512BW 0 "register_operand")
- (maxmin:VI8_AVX2_AVX512BW
- (match_operand:VI8_AVX2_AVX512BW 1 "register_operand")
- (match_operand:VI8_AVX2_AVX512BW 2 "register_operand")))]
+ [(set (match_operand:VI8_AVX2_AVX512F 0 "register_operand")
+ (maxmin:VI8_AVX2_AVX512F
+ (match_operand:VI8_AVX2_AVX512F 1 "register_operand")
+ (match_operand:VI8_AVX2_AVX512F 2 "register_operand")))]
"TARGET_SSE4_2"
{
if (TARGET_AVX512F
