https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79173
--- Comment #2 from Marc Glisse <glisse at gcc dot gnu.org> --- (In reply to Marc Glisse from comment #1) > Trying 23, 24 -> 25: > Successfully matched this instruction: > (parallel [ > (set (reg:SI 105) > (plus:SI (plus:SI (ltu:SI (reg:CCC 17 flags) > (const_int 0 [0])) > (reg:SI 37 r8 [ c ])) > (reg:SI 38 r9 [ d ]))) > (clobber (reg:CC 17 flags)) > ]) > Instruction not appropriate for target. I didn't notice immediately, but apparently ix86_legitimate_combined_insn was happy to let combine propagate the hard registers r8 and r9 into the simple additions *addsi_1 which has (match_operand:SWI48 2 "x86_64_general_operand" "rme,re,0,le"), but then it won't accept them in the addition with carry. My guess would be that letting the hard registers into the additions is premature and should be delayed until after combine. If I manually reject those in gdb, we do produce addl+adcl.
