https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79058
--- Comment #9 from Segher Boessenkool <segher at gcc dot gnu.org> ---
With the code and flags in comment 2 i get a segmentation fault, instead
(with a powerpc64-linux host), somewhere during LRA.
insn 10 is
===
(insn 10 8 11 2 (set (reg:DI 120)
(and:DI (subreg:DI (reg:SI 117) 0)
(const_int 1 [0x1]))) "79058.c":7 79 {*anddi3_insn}
(expr_list:REG_DEAD (reg:SI 117)
(nil)))
===
and IRA has chosen r0 for both regs (note they are different modes though!)
LRA does:
===
Choosing alt 4 in insn 10: (0) &r (1) 0 (2) De {*anddi3_insn}
Creating newreg=123 from oldreg=120, assigning class GENERAL_REGS to r123
10: r123:DI=r123:DI&0x1
REG_DEAD r117:SI
Inserting insn reload before:
17: r123:DI=r117:SI#0
Inserting insn reload after:
18: r120:DI=r123:DI
===
r123 is assigned r0 as well, and insn 18 is deleted, and it dies shortly
after that.
