[Bug target/78192] extract from vector registers to int results in wrong data order

[meissner at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78192

--- Comment #3 from Michael Meissner <meissner at gcc dot gnu.org> ---
Author: meissner
Date: Thu Nov  3 23:32:07 2016
New Revision: 241834

URL: https://gcc.gnu.org/viewcvs?rev=241834&root=gcc&view=rev
Log:
2016-11-03  Michael Meissner  <meiss...@linux.vnet.ibm.com>

        PR target/78192
        * config/rs6000/vsx.md (vsx_extract_<mode>_di): The element number
        has already been adjusted for endianness, so don't adjust it any
        further.


Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/rs6000/vsx.md